IDE

a) In 'Compatibility' mode
use fixed addresses
  ___________________________________________
  |           | Command Block | Control Block |
  |  Channel  |   Registers   |   Registers   |
  |-----------|---------------|---------------|
  |  Primary  |  1F0h - 1F7h  |  3F6h - 3F7h  |
  |-----------|---------------|---------------|
  | Secondary |  170h - 177h  |  376h - 377h  |
  |-----------|---------------|---------------|

b) In Native-PCI mode
IDE registers are mapped into IO space using the BARs in IDE controller's PCI Configuration Space
   ___________________________________________________
  |           |   Command Block   |   Control Block   |
  |  Channel  |     Registers     |     Registers     |
  |-----------|-------------------|-------------------|
  |  Primary  | BAR at offset 0x10| BAR at offset 0x14|
  |-----------|-------------------|-------------------|
  | Secondary | BAR at offset 0x18| BAR at offset 0x1C|
  |-----------|-------------------|-------------------|